The product is discontinued. For any queries, please contact, support@slscorp.com.
Enhanced ClearNAND Controller IP Core is the intermediate stage between NAND Flash memory and master controller. It is designed to have high speed solution to manage NAND Flash application. It supports Open NAND Flash Interface Working Group (ONFI) standard. Two advanced architectures - register based and descriptor based, provides high speed performance, software flexibility, data integrity and device compatibility. Descriptor based architecture reduces amount of CPU intervention.
Enhanced ClearNAND Controller IP Core gives full support for Altera’s SOPC Builder and Qsys based systems and provides communication between processor and NAND Flash device using Avalon interface.
Development/Evaluation Board:
SLS has developed a development Board with Enhanced ClearNAND Flash that can be used to verify the functionality of IP Core.
Block Diagram:
Features:
- Supports ONFI EZ NAND 2.3 plus enhanced command set
- Supports integrated 32 bit DMA interface for data transfer
- Supports interrupt driven functionality
- Supports [0-5] asynchronous and [0-5] source synchronous modes of operation
- Supports 8 bit data bus
- Supports command repeat and auto address increment functionality
- Configurable buffer depth
- Multi-Plane (interleave) operation support
- Avalon Bus Compliant
Implementation Results on Cyclone IV E:
IP Core | Interface | LEs | Memory Bits | Performance (fmax) MHz | |||
Enhanced ClearNAND Controller (with internal DMA) |
Asynchronous |
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Synchronous |
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Enhanced ClearNAND Controller (without internal DMA) |
Asynchronous |
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Synchronous |
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Verification:
- The IP Core is tested on SLS USB 3.0 Development Board
- Enhanced ClearNAND Controller IP core's functionality is verified in Altera ModelSim simulation software using test bench written in Verilog HDL
Deliverables:
Contents | Evaluation License | Full Development License |
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License Type | One (1) month evaluation license at no cost Note: License can be extended for another month after examining request (Evaluation Now) |
Encrypted IP Core Perpetual license for development Note: Other licensing schemes and source code are also available |
Reference Design | Included for SLS USB3.0 Board | Included for SLS USB3.0 Board |
Nios II Sample Applications | Nios II Command Test Application in 'C' | Nios II Command Test Application in 'C' |
Technical Documents |
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Technical Support | Pre sales support from support team | 1 Year integration support for Altera Quartus II |
Downloads:
Note: Enhanced ClearNAND is a registered trademark of Micron.