USB 3.2 FMC (FPGA Mezzanine Card) makes it easier to validate USB 3.2 functionality with FPGA having inbuilt serial transceivers. It also contains ULPI PHY chip to validate USB 2.0 functionality.

Block Diagram:

 Features:

• Standard Interface
  • FMC
• USB Interface
  • x2 USB Type C Connectors
  • x2 USB Power switches to facilitate USB Host mode evaluation
• User Interface
  • x4 user defined LEDs
  • General Purpose Ios
• Jumpers
  • For configuring TUSB1002 (USB 3.2 Linear redriver and signal conditioner)
• Oscillator and Clock Generator Add on Board
  • 25 MHz clock oscillator with clock generator IC for USB 3.2 interface
• Easy to Use
  • Makes it easy to evaluate various SLS’s USB IP cores

Application:

• Evaluation of USB IP cores

Application Examples:

The following example shows USB 3.2 FMC connection with FPGA Development Kit.

Deliverables:

• USB 3.2 FMC
• USB 3.2 Type C Cable
• Note: The board does not include any Reference design.

Downloads:

• USB 3.2 FMC Document

Related Links:

• USB 3.2 Gen 2 Device Controller IP Core