Description
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I²S Controller is designed to transfer audio data to and from Audio codec. It can be configured as both Master and Slave mode using software. The I²S IP is Phillips Inter IC Sound (I²S) specification compliant core for Altera devices.
It is provided as Altera SOPC Builder ready component and integrates easily into any SOPC Builder generated system.
Block Diagram:
Features:
- 8-bit and 16-bit sampling data width support
- Variable sampling rate support
- Used in both master/slave mode
- Internal two 64 x 32 bit FIFO for data buffering
- 32-bit DMA engine for both data transmit and receive for reducing CPU overhead
- Transmit and Receive Operation
- Compliant with the Avalon bus
- Left and Right channel support
Implementation Results:
| Supported Family | Resource Utilization | Memory Blocks | Performance ( Avalon Clock - fmax ) |
|---|---|---|---|
| Cyclone III | 800 LE | 2 M9K | 176MHz |
| Cyclone IV | 815 LE | 2 M9K | 158MHz |
| Cyclone V | 339 ALM | 2 M10K | 141MHz |
| Stratix III | 512 ALUT | 2 M9K | 142MHz |
| Stratix IV | 514 ALUT | 2 M9K | 142MHz |
| Stratix V | 340 ALM | 2 M9K | 160MHz |
| Arria II | 514 ALUT | 2 M9K | 160MHz |
| Arria V | 318 ALM | 2 M10K | 192MHz |
| MAX 10 | 769 LE | 2 M9K | 146MHz |
Verification:
- I²S IP Core functionality is tested on NEEK kit.
Deliverables:
| Contents | Evaluation License | Full Development License |
|---|---|---|
| License Type | One (1) month evaluation license at no cost Note: License can be extended for another month after examining request (Evaluation Now) |
Encrypted IP Core Perpetual license for development Note: Other licensing schemes and source code are also available |
| Reference Design | Included for NEEK Kit | Included for NEEK Kit |
| Nios II Sample Applications | I2S Application | I2S Application |
| Simulation Library | Altera Modelsim | Altera Modelsim |
| Technical Documents |
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| Technical Support | Pre sales support from support team | 1 Year integration support for Altera Quartus II |
Downloads:
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