Questions

Pre-sales

• Does SLS SD Host Controller IP have SDIO interface?

  No. The IP core does not support SDIO interface but we can give SDIO interface as design services. Please contact This email address is being protected from spambots. You need JavaScript enabled to view it. .

• What type of SD card does your IP core supports?

  The IP core supports SD as well as SDHC Memory cards.

• Does the core support DMA interface?

  Yes, the core supports DMA interface. You can take a look at the setup reference design for implementing DMA in the system design.

• Which mode does it supports for data communication?

  The core supports SD 1-bit and 4-bit mode for data communication as per SD Physical Layer Specification v2.0.

• What is the cost of the IP core?

  For the cost of the IP core please contact This email address is being protected from spambots. You need JavaScript enabled to view it. .

• What is the difference in OpenCore and Full version of IP core?

  In the evaluation version of the IP core, you will be able to generate the time-limited programming file for the hardware which will expire after pre-defined time period. Once the program is downloaded and timeout occurs, the hardware evaluation IP Core will stop working. Initially, one (1) month evaluation license is provided which can be extended upon request and justification of the product evaluation needs. In full version of the IP core, you will be able to generate the programming file without timing limit.

• What performance you have achieved using the IP Core?

  190 Mbits/Sec in read and 160 Mbits/Sec in write speed achieved with SD Host controller IP core. (With Sandisk 4 GB Extream II Card).

• Can I get the source code of HAL?

  You will get the source code of HAL after registered yourself on SD organization.

• Do you provide source code of the IP core?

  The standard version of IP Core does not come with the source code but can be provided on request and payment of a separate license fee. However, some software applications ship with full source and are listed in the deliverables.

• Does it comply with SD host Controller V2.0?

  The IP core follows SD physical layer specification v2.0 and it supports high SD high capacity card.

• How do I verify core functionality in hardware as well as in simulation?

  The IP Core package includes an embedded evaluation demonstration board that can be used to verify the core functionality in hardware. The package does not contain any simulation library, but in future releases it may include it.

• I want a hardware only solution for my product. I do not intend to use Nios II processor or SOPC builder. Do you have a solution?

  No. it is not possible to use only core. You must have to use the SD host controller with the Nios II processor. But it may change as per the processor used in the design.

• Does the core support FPGA other than Altera?

  The package only supports Altera FPGA. If customer wants to implement it FPGA other than Altera then we can work mutually on design service agreement. For this please contact This email address is being protected from spambots. You need JavaScript enabled to view it. .

IP Implementation

• Are DSP builder blocks provided for reading and writing to the SD card?

  No, there is no DSP builder blocks provided, but we provide a ready to use reference design for using SD Card using our SD Host Controller IP Core (the core is required to be downloaded separately from the website).

• Does the IO bank on the cyclone that interfaces with the SD Card have to run on 3.3V?

  Any IO which operates on 3.3 voltage level can be used for SD Card interface.

• How does the IP Core decide the SD clock frequency? What is the maximum frequency supported?

  The Ip Core supports variable clock frequencies that can be selected using the software.You can set SD Clock frequency by writing the value in to the Control register or using the sdhc_set_frequency() API. In C file, "sd_info.sdhc_clock" is used to define SD Host IP core clock given in SOPC. On the basis of this, the SD host controller decides the pre-scale value to calculate the frequency for the SD card. As per the specification SD Host should support a maximum of 50 MHz for High Speed card and a maximum of 25 MHz for normal card. Now if your card supports the High Speed mode then it will be automatically detected and the frequency will be set accordingly. Hence, for High Speed card, the clock won't increase more than 50 MHz and for normal card it won't increase more than 25 MHz.

• How much block length does the IP core support?

  IP core supports variable block length to read/write to/from SD card. The block length is programmed by writing to BlockLength register in the software.

• I am getting 'ERROR: Failed to send CMD(5) due to command time out condition' error message. What does it mean?

  CMD[5] is used for the identification of the inserted SDIO card. The message will be displayed only when the card inserted is not a SDIO card.

• I am getting 'Unable to mount FAT File System on SD Card' error message. What does it mean?

  There are mainly two reasons for getting this error message:

  • The data read/write memory is not connected with the SDHC IP component in the SOPC Builder or Qsys.
  • The SD card is not formatted with the FAT file system

• Is it allowed to format the SD Card on a windows PC?

  Yes, it is allowed to format the SD Card on a windows PC. Please select "512 Bytes" under "Allocation unit size" in the Format window.

• Does the IP Core supports to get an interrupt when the DMA completes the write operation?

  Yes, the current IP Core setup has the feature to provide an interrupt when the DMA completes the write operation. For implementation, please contact This email address is being protected from spambots. You need JavaScript enabled to view it. .

• Do you provide any documentation of the rockbox FAT file system?

  The rockbox is an open source file system. The detailed documentation is available at rockbox community.

Related Link

• Licensing/Installation