Questions

Pre-sales

• What is the type of your Host?

  The type of the Host Controller is an embedded.

• Do you have USB 2.0 Device IP Core?

  Yes, we do have different variants of USB 2.0 Device Controller. You can find more information about those IP cores at http://www.slscorp.com/ip-cores/communication/usb-20-device.html

• How many transfer types does IP core support?

  IP core supports Control, Bulk and Interrupt transfers. Isochronous transfer can be supported based on requirement.

• What performance have you achieved using the IP Core?

  Here is description about platform on which following speed performance was measured:

  • Development Board : SLS CoreCommander Board
  • Nios II CPU Type : Fast
  • CPU Clock Frequency : 100 MHz
  • DMA Enabled : Yes

   

  With Embedded HAL driver, we have achieved following performance:

  1. Up to 20 MBps ( Mega Bytes per Second ) for raw data read operation and up to 19 MBps for raw data write operation in High speed mode.
  2. Up to 1 MBps for raw data read and write operation in Full speed mode.
  3. Up to 14 MBps for Mass-storage read and up to 11 MBps for Mass storage write operation in High speed mode.
  4. Up to 1 MBps for Mass-storage read and write operations in Full speed mode.

   

  With Linux driver, we have achieved following performance:

  1. Upto 1.5 MBps for Mass-storage read and write operations in High speed mode.

   

  # Note that here we are running Linux operating System on Nios II CPU at 100 MHz. Due to Linux system overhead, performance here is less compared to Embedded HAL driver.

• Which platform does your IP core support?

  The IP core can work on Linux and uCLinux platform. SLS has developed the driver for each platform to work. SLS has also developed stand-alone HAL driver.

• Do you provide the source code of your IP?

  Yes, we do provide source code of the IP core but at an additional cost. For that you can contact us at This email address is being protected from spambots. You need JavaScript enabled to view it. .

• Can I get the source code of the HAL?

  Yes. You can request for the source code of HAL at This email address is being protected from spambots. You need JavaScript enabled to view it. at additional cost.

• How do I verify core functionality in hardware as well as in simulation?

  The IP Core package includes CoreCommander board that can be used to verify the core functionality at hardware level. The package also includes simulation environment which contains pre-compiled simulation libraries to verify functionality in simulation.

IP Implementation

• Does the core supports any type of USB device plug-in?

  Host core will be able to detect any USB2.0 compliant device which uses any of following transfers: Control, Bulk or Interrupt.

• Where does 60MHz clock come from in the IP core reference design?

  In the reference design provided, the 60 MHz clock comes from the PHY chip. It is recommended to use the same clock for the PHY chip and the IP core to avoid synchronization issues

• With which ULPI transceivers have you verified operation?

  Host core can work with any transceiver which is ULPI compliant. So far, our host core is known to work well with following transceivers : Richnex RN1133, SMSC USB3315, SMSC USB3320, SMSC USB3340, NXP ISP1504.

• Does core require external memory to buffer data during communication with USB device?

  Host core uses internal on-chip memory to buffer data during communication with USB device.

Related Link

• Licensing/Installation